Article

Journal of Engineering Research

, 3:4

First online:

Open Access This content is freely available online to anyone, anywhere at any time.

A hybrid mapping algorithm for reconfigurable nanoarchitectures

  • Hessa K. Al-MutairiAffiliated withComputer Engineering Department, Kuwait University
  • , Imtiaz AhmadAffiliated withComputer Engineering Department, Kuwait University Email author 

Abstract

Nanotechnology is emerging as one of the most promising alternative technology to CMOS technology because of its higher density, high speed, lighter, and lower power consumption; however, defects are much higher in nanotechnology. Therefore, the need for defect-tolerance techniques becomes crucial in nanotechnology. This paper addresses an important intractable problem of finding a maximum size defect-free sub-crossbar in defective nano-scale crossbars for a higher yield. We propose a hybrid mapping algorithm by embedding known greedy heuristics with genetic algorithm (GA) to search a large solution space effectively. The proposed algorithm exploits the degrees of nodes, which play a crucial role in the selection mechanism in the greedy mapping heuristics to generate a better quality solution. In the proposed algorithm, GA provides the selection order by generating a new set of degrees that are used by the greedy mapping heuristic to find a new value for the defect-free sub-crossbar (k). The experimental results demonstrate the effectiveness of the proposed hybrid algorithm in finding a large size defect-free sub-crossbar compared to the existing state-of-theart greedy heuristics.

Keywords

Biclique problem defect tolerance genetic algorithm (GA) mapping algorithm nano-crossbar switches nanotechnology